A Comparative Analysis of Doherty and Outphasing MMIC GaN Power Amplifiers for 5G Applications

A comparison between a fully integrated Doherty power amplifier (DPA) and outphasing power amplifier (OPA) for fifth Generation (5G) wireless communications is presented in this paper. Both amplifiers are integrated using pHEMT transistors from the OMMIC’s 100 nm GaN-on-Si technology (D01GH). After a theoretical analysis, the design and layout of both circuits are presented. The DPA uses an asymmetric configuration where the main amplifier is biased in class AB and the auxiliary amplifier is biased in class C, while the OPA uses two amplifiers biased in class B. In the comparative analysis, it has been observed that the OPA presents a better performance in terms of maximum power added efficiency (PAE), while the DPA provides higher linearity and efficiency at 7.5 dB output back-off (OBO). At a 1 dB compression point, the OPA exhibits an output power of 33 dBm with a maximum PAE of 58.3% compared to 44.2% for the DPA for an output power of 35 dBm, and at 7.5 dB OBO, the DPA achieves a PAE of 38.5%, while the OPA achieves 26.1%. The area has been optimized using absorbing adjacent component techniques, resulting in an area of 3.26 mm2 for the DPA and 3.18 mm2 for the OPA.


Introduction
The fifth generation (5G) allows 1000 times more data transmission capacity than the 4G technology, 10 to 100 times more connectivity between devices, 5 times more responsiveness, 90% energy savings and the same efficiency everywhere. In other words, the goal of 5G is to increase usage, speed and services in telecommunication, as well as reducing energy consumption. However, there is a hidden threat behind the promise of 5G. This new wireless communication can deliver much more data than current networks, but at a higher energy cost. Fears about energy efficiency are beginning to surface and, therefore, the use of new alternative energy methods has become an important area of research. The International Telecommunication Union (ITU) and the Third Generation Partnership Project (3GPP) have published challenging measurable requirements on the data rates, latency and reliability that a network needs to support 5G and distinguish itself from 4G [1,2]. The key performance indicators (KPIs) for 5G wireless technology are grouped into three main categories: the millimetre-Wave (mm-Wave), ultra-reliable low latency communication (URLLC) and the massive machine-type communication (mMTC). mm-Wave new radio (NR) focuses on enhancing mobile broadband (eMBB) to increase data bandwidth and efficient connectivity. This enables better upload and download speeds compared to 4G/LTE networks, and it uses a different set of radio frequency bands. On the other hand, ultra-reliable low latency communication (URLLC) focuses on achieving low latency for mission-critical applications, such as factory automation, remote robotic surgery and self-driving cars. URLLC requirements are still being standardized and are part of the different 3GPP releases [3]. Lastly, massive machine-type communication (mMTC) focuses on low-power, high-density targeting of narrowband Internet of Things (NB-IoT) applications and smart devices [4]. The frequency bands for 5G mobile networks are organized into two different frequency ranges (FR): FR1 and FR2. FR1 ranges from 450 MHz to 6 GHz. These bands are also known as Sub-6 GHz. FR2 ranges from 24.25 GHz to 52.6 GHz and the bands are named mm-Wave [5,6].
The demand of wide bandwidth and high peak-to-average power ratio (PAPR) have been increasing in modern wireless communication systems such as 5G because they use complex-modulated signals. This means that the transmission chains, especially the power amplifiers (PA) must work with a higher back-off output power (OBO), providing users with a high efficiency, as well as maintaining the linearity. Several PA architectures have been developed to improve efficiency at back-off levels [7][8][9][10][11]: envelope-tracking PA, envelope elimination and restoration PA, Doherty PA (DPA) and outphasing PA (OPA).
The envelope tracking (ET) [12,13] and envelope elimination and restoration (ERR) [14,15] techniques are based on the bias modulation principle, in which the RF power's collector/drain supply is varied with the output envelope, thus resulting in higher efficiency and linearity of the transistor over a broad range of output power. However, the drawback of these PAs is the limited modulation bandwidth of the supply modulator as its performance depends upon the efficiency of the power amplifier, peak power and dynamic range.
The other techniques are based on the principle of active load modulation, which are the Doherty [16] and Outphasing [17] techniques. However, one of the main problems with these architectures is the high occupied area due to the use of power dividers and combiners at the input and output. For very high frequencies, these elements are usually implemented with transmission lines, while for lower frequencies, such as those used in Sub-6 GHz 5G, they are implemented with lumped elements. A design methodology presented in [18] involves absorbing adjacent components into one single element for an outphasing amplifier, which reduces the complexity of the output network and decreases the occupied area.
The objective of this paper is to compare the conventional DPA architecture with the OPA at 3.6 GHz. Both circuits will be implemented with lumped components, and the technique presented in [18] will be utilized to reduce their area. The design of both amplifiers will use a pHEMT GaN-on-Si transistor with depletion mode from the OMMIC foundry. Sections 2 and 3 describe the operating principles of the Doherty and outphasing PAs, respectively, and also present the basic circuit configuration of both PAs. Section 4 shows the comparative simulation results of the two PAs, followed by conclusions in Section 5.

Doherty Amplifier Analysis
The Doherty PA was first proposed by W. H. Doherty in 1936 with the use of vacuum tubes. This new device was first used in a 50 kW transmitter radio station in Kentucky, improving the efficiency of the RF power amplifier. Nowadays, with the release of new communication standards, the amplifier has been reinvented by mobile communication systems using semiconductor devices at higher frequencies. The Doherty amplifier is based on the active load-pull technique, which has been widely explained in the literature [7,16,19]. However, to understand its operation, this explanation will be made, so the following scheme of the Doherty amplifier must be considered in Figure 1, where two current sources are connected to an impedance R [7,19].
Applying Kirchhoff and Ohm's laws in the circuit, the voltage across the impedance is given by [7]: where I 1 and I 2 are the currents supplied by the sources I 1 and I 2 , respectively. Therefore, if the currents are not null, the load impedance seen by the source I 1 is [7]: Similarly, the load resistance seen by the current source I 2 is given by [7]: From Equations (2) and (3), we can observe that the impedances (R 1 and R 2 ) seen by one current source are controlled by the current level of the other one. Therefore, changing the impedance level seen by one current source results in a variation of the voltage across the impedance R. Now, consider that the ideal current sources are active devices such as transistors (main and auxiliary). To maximize the efficiency of a device (main), while its output load is changing (by the current supplied by the auxiliary device), the voltage swing across it must be maintained constant. To guarantee this condition, a λ/4 transmission line is added between the load and the main source, as shown in Figure 2.  Now, the impedance seen at each side of the load resistors can be expressed as shown in (4) and (5) [7].
The λ/4 transmission line (T-Line) after the main amplifier acts as an impedance transformer. The relationship between the voltages and currents placed at the sides of this T-Line can be written as follows [7]: Rearranging (6) and (7), I 1T and V 1T can be expressed as [7]: Substituting (8) and (9) in (4) and (5) and rearranging the equations, Z 1T and Z a can be rewritten as [7]: Thus, clearing Z m from (8) and substituting Z 1T , the output impedance seen by the main amplifier is [7]: Moreover, the effective load impedances seen by the current sources (Z m and Z a ) can be expressed as a function of Z T and Z L as it follows [20]: Noting that V m = I m · Z m , by addition and subtraction, we can have [20]: Typically, standardized characteristic impedances for the quarter-wavelength line is Z T = Z 0 , while the load is Z L = Z 0 /2. Assuming that there are identical currents at saturation, the effective impedances at different power levels can be easily calculated using (13) and (14). Therefore, when the input signal is low, only the main amplifier is active, while the auxiliary amplifier remains inactive due to its Class-C biasing. This is because the auxiliary amplifier requires a higher input signal to initiate current flow. This is called the low-power region. Figure 3 shows the operating scheme of the DPA when the main device is on and the auxiliary one is off, and the impedances are given by [20]: Conversely, when the input signal is high, the main amplifier reaches saturation, resulting in the first efficiency peak. Under these conditions, both amplifiers operate simultaneously and enter the so-called Doherty region. In this region, the second efficiency peak is achieved at maximum output power. Figure 2 shows the operating scheme of the DPA when both amplifiers are on, and the impedances are given by [20]: To conclude, the load of the main amplifier goes from 2Z 0 to Z 0 , while the auxiliary amplifier is modulated from ∞ to Z 0 , as it is represented in Figure 4a. The theoretical expected efficiency behavior is reported in Figure 4b. Therefore, DPAs are commonly implemented according to the configuration depicted in Figure 5. This setup comprises a power splitter, a main (or carrier) amplifier, and an auxiliary (or peaking) amplifier. As shown in the figure, the main PA is followed by a λ/4 T-Line, which is utilized for accurate load modulation. To ensure delay matching, another λ/4 T-Line is inserted at the input of the auxiliary amplifier [16].

Design and Implementation
The design of the DPA is described in this subsection. As recommended by the foundry, for the design of power amplifiers, a 100 nm GaN-on-Si transistor was used to design the main and auxiliary amplifiers. These transistors have been modeled for use in both small and large signal simulation. An asymmetric configuration is adopted where the peaking amplifier is larger than the main one. The main amplifier is biased in Class-AB and the auxiliary in Class-C, so that the gate voltage (VGS) and drain voltage (VDS) in the main amplifier are −1.5 V and 9 V, respectively, while in the auxiliary amplifier, the VGS is −3.1 V and the VDS is 12 V.
Stability is a crucial part of a PA design, which requires special precautions to avoid unwanted oscillations. In order to avoid such instabilities, an RC network is added in the main amplifier (R1 and C1) [7,21] to make the amplifier unconditionally stable, as seen in Figure 6a. The inductors L1 and L2 and capacitors C3 and C2 are used to match the amplifier for maximum PAE. On the other hand, as shown in Figure 6b, the auxiliary amplifier does not need a stabilization network since it is stable. Inductors L3 and L4 and capacitors C4 and C5 make up the input and output matching networks of the auxiliary amplifier. The transmission lines (TL1-TL4) are used to connect the source of the transistors to ground. A hybrid coupler was chosen to split the input power between the main and auxiliary amplifiers. This type of hybrid provides a 90-degree phase shift between its outputs [21], so the λ/4 T-line at the input of the auxiliary amplifier can be eliminated, reducing the circuit area.
The design of this component is relatively straightforward. The basic configuration is shown in Figure 7a. When power is introduced to the input port, half the power (−3 dB) flows to the 0-degree port (output 1), and the other half is coupled to the 90-degree port (output 2). The reflections from the mismatches are sent back to the output ports and they either flow directly to the isolated port or cancel at the input. This configuration ensures a high degree of isolation between the two output ports and the two input ports without any unwanted interaction between them [22]. In the first approach, the output network and the input hybrid of the DPA were designed with transmission lines, but due to its large area (7700 µm × 81 µm), they were discarded. Therefore, the output λ/4 T-line was replaced by a lumped-elements T-line using a π-network. This network is composed of capacitors (C10 and C11) and inductor (L9) [23]. Likewise, the input hybrid was implemented with lumped elements using inductors (L5, L6, L7 and L8), capacitors (C6, C7, C8 and C9) and resistor (R2) at the isolated port (see Figure 7b). The resulting schematic of the DPA is shown in Figure 8. As shown in Figure 8, there are parallel inductors with capacitors that can be eliminated by resizing other passive components. However, it is important to note that these simplifications cannot be made simultaneously. Instead, they have been implemented sequentially, optimizing the PAE after each individual change. Figure 9 and Table 1 illustrate the simplified schematic and the corresponding component values, respectively. In the schematic, Wfg and Nfg represent the width and number of gate fingers of the transistors, while W and L denote the width and length of the T-lines.
The layout of the DPA described in this paper was implemented using the 100 nm GaN-on-Si OMMIC process (D01GH). Figure 10 illustrates the final layout, which occupies an area of 2517.1 µm × 1293.5 µm (including PADs). The DC biasing PADs are located at the top and bottom of the chip, while Ground-Signal-Ground (GSG) RF input and output PADs are placed on the left and right sides. RF bias choke inductors were not included due to their high value.

Outphasing Amplifier Analysis
Although this analysis can be found in the literature [7,17,24], in this subsection, the Outphasing amplifier is analyzed to provide a theoretical basis that helps to understand the results obtained. In 1935, Henri Chireix introduced the term outphasing for the first time in his paper "High Power Outphasing Modulation" [17]. This architecture emerged to reduce power consumption in tube-based transmission stations. Several years later, its application was expanded to microwave frequencies, and it became known as linear amplification using nonlinear components (LINC), which shows outphasing as a technique that produces a linear modulation by combining the output of non-linear amplifiers. If the two PA outputs are in opposite phases, output power is increased. Therefore, the combiner can be treated as a vector summation element. Figure 11 illustrates a block diagram of the outphasing power amplifier, in which the input signal component separator (SCS) network converts the amplitude-modulated (AM) signal into two phase-modulated (PM) signals with opposite phases and constant envelopes. These two signals are then combined to generate an output AM signal after being amplified by two highly efficient amplifiers. To understand the operation principle of the outphasing PAs, a simplified concept of the load modulation technique is represented in Figure 12. The PAs are assumed to act as ideal voltage sources with equal amplitudes and opposite phases and are connected to a common series load resistance [7]. The voltage sources can be described by [7]: Applying the second Kirchhoff's law in Figure 12, the circulating current can be written as [7]: The effective load seen by the current sources Z 1 and Z 2 is [7]: From Equations (22) and (23), it is clear that each PA varies the load seen by the other according to the value of the outphasing angle θ.
To verify the above equations, the schematic in Figure 13a was simulated. As seen in Figure 13b, when θ is equal to 0-degree, the output power is null, and as a result, the load impedances act as an open circuit. However, when θ is 90-degrees, the load impedances are purely resistive (R/2) and the output power is maximum. For the rest of the values, the impedances present a substantial imaginary part, and therefore the efficiency decreases. However, by adding two shunt-compensating reactive elements (see Figure 14a), a second efficiency peak can be obtained. These shunt-compensating reactive elements have equal but opposite susceptance. As shown in Figure 14b, the load trajectories of the two branches cross the real axis. Figure 15 shows a comparison between the efficiencies of the Doherty and the outphasing topologies. Interestingly, the shape of the efficiency curve of the outphasing topology has two efficiency peaks like that of the Doherty. As in the Doherty PA, the outphasing efficiency changes depending on the desired OBO. Based on the previous analysis, it is evident that the outphasing architecture can provide a higher efficiency at back-off levels since it maintains higher values between the two peaks.

Design and Implementation
In this subsection, the design of the outphasing amplifier is described. To obtain a high PAPR, a Class-B amplifier was used. This configuration provides a good trade-off between efficiency and linearity [21]. A 100 nm GaN-on-Si transistor was used to design the amplifier with a 12 V of drain voltage and −1.75 V of gate voltage.
To ensure low-frequency stability, a stabilization network on the drain and gate bias lines was added as seen in Figure 16 [25]. Additionally, a stability network composed by capacitor C1 and resistor R1 was added at the gate of the transistor to guarantee the stability of the RF power transistor [7,21]. Finally, inductors L2 and L3 and capacitors C2 and C3 were used to match the input and the output of the transistor.
As in the case of the Doherty amplifier, due to large area of the TL, they were replaced by lumped-elements. Thus, the λ/4 T-line of the biasing network was replaced by inductors L4 and L3 as seen in Figure 17 [23].
The main function of the SCS is to translate the input AM signal into two PM signals with opposite phases. This component is complex to design, and both digital and analog implementations can be found in the literature [26,27]. The design of this component implies an increase in the complexity and power consumption of the circuit. For this reason, in this work, it has been considered that the SCS is an external element, and an ideal component has been used for the simulations. The power combiner is the most critical part in the design of outphasing amplifiers. This component has two major functions. The first one is to convert the conceptual floating load into a single-ended load; the second one is to control the varying loading impedances "seen" by each line of the PA. Power combining is often implemented using variations of the outphasing approach. The transformer is closer to the theoretical development, the quarter-wavelength structure is more often used in hybrid RF PAs due to its easy microstrip structures fabrication and the asymmetric-transmission line has been more recently developed and enables the usage of efficient Class-E modes in the branch PAs [28]. In this case, the amplified AM signal at the output was initially combined using a λ/4 T-Line. However, due to the large area of this line, it was replaced by a lumped LC balun composed by inductors L6 and L7 and capacitors C6 and C7. The schematic of the outphasing PA design is shown in Figure 17. To simplify the number of components, and therefore the area of the circuit, some elements were combined or removed. Thus, L2 and C6 from PA1 were removed because they are in parallel and their equivalent admittance is almost null. Inductors L3 and L1 were combined, as well as L4 and Lck and also L2 and L5. The resulting scheme of the outphasing PA is shown in Figure 18. The component values are shown in Table 2.   Figure 19 displays the layout of the outphasing power amplifier (PA), which occupies an area of 1755 µm × 1824 µm, including the DC, input and output PADs.  Figure 20a,b show the output power and PAE plotted as a function of the input power for the DPA and OPA, respectively. As can be seen in Figure 20a, the DPA provides a saturation power of 35 dBm and for that point, the PAE is 44.2%. For an OBO of 7.5 dB, the PAE of the DPA is 38.5%. On the other hand, Figure 20b shows that the saturation power of the OPA is 33 dBm and for that point, its efficiency is 58.3%, while at an OBO of 7.5 dB, the efficiency decreases to 26.1%. Figure 20c  The stability analysis can be divided into two groups: even-mode stability and oddmode stability analyses. In the even-mode stability analyses, the Rollett stability factor (K) and the Nyquist stability criteria were calculated and, in the odd-mode stability, the Nyquist stability criterion was calculated. From the S-parameter simulation results, the K factor was greater than 1 (K > 1) [21]. However, checking the K-factor of the overall design was not enough, because Rollett's K-factor guarantees the stability throughout the entire amplifier while the Nyquist stability criterion is usually used to ensure the stability of each individual stage. Hence, instabilities may appear at low frequencies. According to the Nyquist stability criterion, instabilities can occur if the magnitude is greater than 1 (>1) and encircle the (−1 + 0j) the point in a counter-clockwise direction. For the even-mode stability analysis, we employed the method described in [29]. Figures 21 and 22 present the OPA and DPA even-mode stability simulation results. As observed, both amplifiers exhibit stable behavior. On the other hand, odd-mode instability is more likely to occur in multi-device amplifiers due to different transistor characteristics and matching techniques. In Ref. [30], stability analysis is presented, examining the open-loop transfer functions at the junctions between passive and active devices. To ensure loop stability, none of these functions can encircle the critical point (1 + 0j) in a clockwise direction. Figure 23a,b display the simulation results for odd-mode stability of the OPA, while Figure 24a,b demonstrate the odd-mode stability simulation results of the main and auxiliary amplifiers in the DPA. Based on the plotted results of the odd-mode stability analysis, both amplifiers exhibit stable behavior. To further evaluate the amplifier performance, both PAs were tested with an OFDM modulated signal with 7.5 dB PAPR. The simulations were carried out at 3.6 GHz without using any digital predistortion, and the signal bandwidth was 100 MHz. Figure 25 shows the simulated error vector magnitude (EVM) and the adjacent channel power ratio (ACPR) (average of lower and upper channels) as a function of average output power (P out,ave ) for different QAM signals. Figure 25a shows that for a low power level, the EVM was −40 dB (0.5%), and for a high-power level, the EVM reached up to −35 dB (1.05%) for the Doherty amplifier. Figure 25b shows that at low power, the EVM in the Outphasing amplifier was between −38 dB (0.7%) and −45 dB (0.4%), but for a higher power level, the EVM value increased significantly reaching up to −19 dB (6%) at some points for the 256-QAM signal. Figure 25c,d show the ACPR simulations of the Doherty and Outphasing amplifiers. As seen in the figures, the ACPR was not affected by the different modulations.

Comparative Analysis
The performance of the designed Doherty and Outphasing PAs is summarized in Table 3 and compared to another reported sub-6 GHz GaN DPAs and OPAs. Regarding the DPA, it can be observed that only reference [31], achieves a higher PAE at a 1-dB compression point. However, it is important to mention that they use drain efficiency as a measure of PAE. In the case of the OPA, all the circuits except for [32] are designed with discrete components and use a preamplifier. Additionally, they also use the drain efficiency to measure the PAE; this is why they have a higher PAE value. As can be seen, our designs occupy an area of 3.26 mm 2 for the DPA and 3.18 mm 2 for the OPA, which are the smallest compared to the state-of-the-art, only followed by [33]. Therefore, the performance of the designed circuits is within the state of the art.

Conclusions
This paper presents a comparative study between Doherty and Outphasing PAs for 5G base stations. A theoretical analysis of both amplifiers has been conducted, and their designs have been carried out. The DPA outperforms the OPA in terms of output power, but at maximum output power, the DPA efficiency is lower than that of the OPA. Specifically, at the 1-dB compression point, the DPA achieves an output power of 35 dBm and a PAE of 44.2%, while the OPA achieves an output power of 33 dBm and a PAE of 58.3%. On the other hand, the DPA exhibits superior linearity and efficiency compared to the OPA at a 7.5-dB output back-off. Specifically, the ACPR for 64-QAM modulation and the PAE at 7.5 dB OBO for the DPA are −38.6 dBc and 38.5%, respectively, while for the OPA, these values are −30.6 dBc and 26.1%. The proposed designs have been compared with similar state-of-the-art designs, and in terms of area, they exhibit the smallest footprint. Due to its superior performance in back-off, it can be concluded that the DPA is the optimal choice for 5G base station applications.